mirror of
https://src.fedoraproject.org/rpms/mesa.git
synced 2024-11-28 02:54:51 +00:00
Update to today's snapshot, apply patches for r600 GPU clock
- glsl: Only allow `invariant` on shader in/out between stages. (Chris Forbes) - mesa: Fix error code generation in glReadPixels() (Anuj Phogat) - mesa: Add an error condition in glGetFramebufferAttachmentParameteriv() (Anuj Phogat) - mesa: Add error condition for integer formats in glGetTexImage() (Anuj Phogat) - mesa: Add helper function _mesa_is_format_integer() (Anuj Phogat) - i965: Fix component mask and varying_to_slot mapping for gl_ViewportIndex (Anuj Phogat) - i965: Fix component mask and varying_to_slot mapping for gl_Layer (Anuj Phogat) - i965: Put an assertion to check valid varying_to_slot[varying] (Anuj Phogat) - mesa: fix GetStringi error message with correct function name (Benjamin Bellec) - mesa: Fix error condition for multisample proxy texture targets (Anuj Phogat) - swrast: Add glBlitFramebuffer to commands affected by conditional rendering (Anuj Phogat) - st/xa: Cache render target surface (Thomas Hellstrom) - mesa: fix check for dummy renderbuffer in _mesa_FramebufferRenderbufferEXT() (Samuel Iglesias Gonsalvez) - mesa: Fix glGetVertexAttribi(GL_VERTEX_ATTRIB_ARRAY_SIZE) (Anuj Phogat) - r600g: Disable LLVM by default at runtime for graphics (Michel Dänzer) Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
This commit is contained in:
Igor Gnatenko
parent
6a418411ac
commit
fcf27045cb
6 changed files with 207 additions and 3 deletions
1
.gitignore
vendored
1
.gitignore
vendored
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@ -68,3 +68,4 @@ mesa-20100720.tar.bz2
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/mesa-20140301.tar.xz
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/mesa-20140305.tar.xz
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/mesa-20140419.tar.xz
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/mesa-20140430.tar.xz
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48
0001-gallium-Add-PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY.patch
Normal file
48
0001-gallium-Add-PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY.patch
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@ -0,0 +1,48 @@
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From 5fe1a0ebadea1dbcdbd1b7a92969a283dcbb3362 Mon Sep 17 00:00:00 2001
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From: Tom Stellard <thomas.stellard@amd.com>
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Date: Fri, 18 Apr 2014 17:35:59 +0200
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Subject: [PATCH 1/3] gallium: Add PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Bruno Jiménez:
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v2: Updated the docs
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v3: Remove trailing comma
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Reviewed-by: Francisco Jerez <currojerez@riseup.net>
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---
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src/gallium/docs/source/screen.rst | 2 ++
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src/gallium/include/pipe/p_defines.h | 3 ++-
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2 files changed, 4 insertions(+), 1 deletion(-)
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diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
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index f5acebb..e22435c 100644
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--- a/src/gallium/docs/source/screen.rst
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+++ b/src/gallium/docs/source/screen.rst
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@@ -313,6 +313,8 @@ pipe_screen::get_compute_param.
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resource. Value type: ``uint64_t``.
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* ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
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allocation in bytes. Value type: ``uint64_t``.
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+* ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
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+ clock in MHz. Value type: ``uint32_t``
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.. _pipe_bind:
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diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
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index fec17f9..9436e7e 100644
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--- a/src/gallium/include/pipe/p_defines.h
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+++ b/src/gallium/include/pipe/p_defines.h
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@@ -642,7 +642,8 @@ enum pipe_compute_cap
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PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE,
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PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE,
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PIPE_COMPUTE_CAP_MAX_INPUT_SIZE,
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- PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE
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+ PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
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+ PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
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};
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/**
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--
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1.9.0
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@ -0,0 +1,73 @@
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From 0a41054b7faa9df4e4b8802f646a7e078389eb89 Mon Sep 17 00:00:00 2001
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From: Tom Stellard <thomas.stellard@amd.com>
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Date: Fri, 18 Apr 2014 16:28:40 +0200
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Subject: [PATCH 2/3] radeon/compute: Implement
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PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Igor Gnatenko:
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v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)
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Bruno Jiménez:
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v3: Convert the frequency to MHz from kHz after getting it in
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'do_winsys_init'
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Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
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Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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---
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src/gallium/drivers/radeon/r600_pipe_common.c | 7 +++++++
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src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 +++++
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src/gallium/winsys/radeon/drm/radeon_winsys.h | 1 +
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3 files changed, 13 insertions(+)
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diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
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index 7508865..957186a 100644
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--- a/src/gallium/drivers/radeon/r600_pipe_common.c
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+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
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@@ -505,6 +505,13 @@ static int r600_get_compute_param(struct pipe_screen *screen,
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}
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return sizeof(uint64_t);
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+ case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
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+ if (ret) {
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+ uint32_t *max_clock_frequency = ret;
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+ *max_clock_frequency = rscreen->info.max_sclk;
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+ }
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+ return sizeof(uint32_t);
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+
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default:
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fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
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return 0;
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diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
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index b53beba..7618316 100644
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--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
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+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
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@@ -317,6 +317,11 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
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ws->info.gart_size = gem_info.gart_size;
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ws->info.vram_size = gem_info.vram_size;
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+ /* Get max clock frequency info and convert it to MHz */
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+ radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SCLK, NULL,
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+ &ws->info.max_sclk);
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+ ws->info.max_sclk /= 1000;
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+
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ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
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/* Generation-specific queries. */
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diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
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index fe0617b..1cb17bb 100644
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--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
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+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
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@@ -196,6 +196,7 @@ struct radeon_info {
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enum chip_class chip_class;
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uint32_t gart_size;
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uint32_t vram_size;
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+ uint32_t max_sclk;
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uint32_t drm_major; /* version */
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uint32_t drm_minor;
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--
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1.9.0
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70
0003-clover-Query-drivers-for-max-clock-frequency.patch
Normal file
70
0003-clover-Query-drivers-for-max-clock-frequency.patch
Normal file
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@ -0,0 +1,70 @@
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From ca848e8bee7683e296e40a7870750d8a156850ca Mon Sep 17 00:00:00 2001
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From: Tom Stellard <thomas.stellard@amd.com>
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Date: Fri, 18 Apr 2014 16:28:41 +0200
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Subject: [PATCH 3/3] clover: Query drivers for max clock frequency
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Igor Gnatenko:
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v2: PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY instead of
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PIPE_COMPUTE_MAX_CLOCK_FREQUENCY
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Bruno Jiménez:
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v3: Drivers report clock in Mhz
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Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
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Reviewed-by: Francisco Jerez <currojerez@riseup.net>
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---
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src/gallium/state_trackers/clover/api/device.cpp | 2 +-
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src/gallium/state_trackers/clover/core/device.cpp | 6 ++++++
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src/gallium/state_trackers/clover/core/device.hpp | 1 +
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3 files changed, 8 insertions(+), 1 deletion(-)
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diff --git a/src/gallium/state_trackers/clover/api/device.cpp b/src/gallium/state_trackers/clover/api/device.cpp
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index b77a50d..1bc2692 100644
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--- a/src/gallium/state_trackers/clover/api/device.cpp
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+++ b/src/gallium/state_trackers/clover/api/device.cpp
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@@ -153,7 +153,7 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
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break;
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case CL_DEVICE_MAX_CLOCK_FREQUENCY:
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- buf.as_scalar<cl_uint>() = 0;
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+ buf.as_scalar<cl_uint>() = dev.max_clock_frequency();
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break;
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case CL_DEVICE_ADDRESS_BITS:
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diff --git a/src/gallium/state_trackers/clover/core/device.cpp b/src/gallium/state_trackers/clover/core/device.cpp
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index 2c5f9b7..2f84677 100644
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--- a/src/gallium/state_trackers/clover/core/device.cpp
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+++ b/src/gallium/state_trackers/clover/core/device.cpp
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@@ -154,6 +154,12 @@ device::max_mem_alloc_size() const {
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PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE)[0];
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}
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+cl_uint
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+device::max_clock_frequency() const {
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+ return get_compute_param<uint32_t>(pipe,
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+ PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY)[0];
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+}
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+
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std::vector<size_t>
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device::max_block_size() const {
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auto v = get_compute_param<uint64_t>(pipe, PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE);
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diff --git a/src/gallium/state_trackers/clover/core/device.hpp b/src/gallium/state_trackers/clover/core/device.hpp
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index 433ac81..3662c6b 100644
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--- a/src/gallium/state_trackers/clover/core/device.hpp
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+++ b/src/gallium/state_trackers/clover/core/device.hpp
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@@ -61,6 +61,7 @@ namespace clover {
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cl_uint max_const_buffers() const;
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size_t max_threads_per_block() const;
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cl_ulong max_mem_alloc_size() const;
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+ cl_uint max_clock_frequency() const;
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std::vector<size_t> max_block_size() const;
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std::string device_name() const;
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--
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1.9.0
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16
mesa.spec
16
mesa.spec
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@ -49,13 +49,13 @@
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%define _default_patch_fuzz 2
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%define gitdate 20140419
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%define gitdate 20140430
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#% define snapshot
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Summary: Mesa graphics libraries
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Name: mesa
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Version: 10.1.1
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Release: 2.%{gitdate}%{?dist}
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Release: 3.%{gitdate}%{?dist}
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License: MIT
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Group: System Environment/Libraries
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URL: http://www.mesa3d.org
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@ -85,6 +85,11 @@ Patch99: 0001-opencl-use-versioned-.so-in-mesa.icd.patch
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Patch100: radeonsi-llvm-version-hack.patch
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# https://bugs.freedesktop.org/show_bug.cgi?id=73511
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Patch101: 0001-gallium-Add-PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY.patch
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Patch102: 0002-radeon-compute-Implement-PIPE_COMPUTE_CAP_MAX_CLOCK_.patch
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Patch103: 0003-clover-Query-drivers-for-max-clock-frequency.patch
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BuildRequires: pkgconfig autoconf automake libtool
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%if %{with_hardware}
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BuildRequires: kernel-headers
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@ -338,6 +343,9 @@ grep -q ^/ src/gallium/auxiliary/vl/vl_decoder.c && exit 1
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%if 0%{?with_opencl}
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%patch99 -p1 -b .icd
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%patch101 -p1 -b .gallium_max_clk
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%patch102 -p1 -b .radeon_max_clk
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%patch103 -p1 -b .clover_max_clk
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%endif
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%patch100 -p1 -b .radeonsi
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@ -645,6 +653,10 @@ rm -rf $RPM_BUILD_ROOT
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%endif
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%changelog
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* Wed Apr 30 2014 Igor Gnatenko <i.gnatenko.brain@gmail.com> - 10.1.1-3.20140430
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- Update to today snapshot
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- apply as downstream patches for reporting GPU max frequency on r600 (FD.o #73511)
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* Sat Apr 19 2014 Igor Gnatenko <i.gnatenko.brain@gmail.com> - 10.1.1-2.20140419
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- fix buildrequires llvm 3.4-5 to 3.4-6, because 3.4-5 is not available for F20
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2
sources
2
sources
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@ -1 +1 @@
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53e96c430057c768545a8ff2da900402 mesa-20140419.tar.xz
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e53a42d8ba8ebb7d07f5781763f9903d mesa-20140430.tar.xz
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