Update to today's snapshot, apply patches for r600 GPU clock

- glsl: Only allow `invariant` on shader in/out between stages. (Chris Forbes)
- mesa: Fix error code generation in glReadPixels() (Anuj Phogat)
- mesa: Add an error condition in glGetFramebufferAttachmentParameteriv() (Anuj Phogat)
- mesa: Add error condition for integer formats in glGetTexImage() (Anuj Phogat)
- mesa: Add helper function _mesa_is_format_integer() (Anuj Phogat)
- i965: Fix component mask and varying_to_slot mapping for gl_ViewportIndex (Anuj Phogat)
- i965: Fix component mask and varying_to_slot mapping for gl_Layer (Anuj Phogat)
- i965: Put an assertion to check valid varying_to_slot[varying] (Anuj Phogat)
- mesa: fix GetStringi error message with correct function name (Benjamin Bellec)
- mesa: Fix error condition for multisample proxy texture targets (Anuj Phogat)
- swrast: Add glBlitFramebuffer to commands affected by conditional rendering (Anuj Phogat)
- st/xa: Cache render target surface (Thomas Hellstrom)
- mesa: fix check for dummy renderbuffer in _mesa_FramebufferRenderbufferEXT() (Samuel Iglesias Gonsalvez)
- mesa: Fix glGetVertexAttribi(GL_VERTEX_ATTRIB_ARRAY_SIZE) (Anuj Phogat)
- r600g: Disable LLVM by default at runtime for graphics (Michel Dänzer)

Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
This commit is contained in:
Igor Gnatenko 2014-04-30 10:20:24 +04:00
parent 6a418411ac
commit fcf27045cb
6 changed files with 207 additions and 3 deletions

1
.gitignore vendored
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@ -68,3 +68,4 @@ mesa-20100720.tar.bz2
/mesa-20140301.tar.xz
/mesa-20140305.tar.xz
/mesa-20140419.tar.xz
/mesa-20140430.tar.xz

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@ -0,0 +1,48 @@
From 5fe1a0ebadea1dbcdbd1b7a92969a283dcbb3362 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Fri, 18 Apr 2014 17:35:59 +0200
Subject: [PATCH 1/3] gallium: Add PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Bruno Jiménez:
v2: Updated the docs
v3: Remove trailing comma
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
---
src/gallium/docs/source/screen.rst | 2 ++
src/gallium/include/pipe/p_defines.h | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst
index f5acebb..e22435c 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -313,6 +313,8 @@ pipe_screen::get_compute_param.
resource. Value type: ``uint64_t``.
* ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
allocation in bytes. Value type: ``uint64_t``.
+* ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
+ clock in MHz. Value type: ``uint32_t``
.. _pipe_bind:
diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
index fec17f9..9436e7e 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -642,7 +642,8 @@ enum pipe_compute_cap
PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE,
PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE,
PIPE_COMPUTE_CAP_MAX_INPUT_SIZE,
- PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE
+ PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
+ PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
};
/**
--
1.9.0

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@ -0,0 +1,73 @@
From 0a41054b7faa9df4e4b8802f646a7e078389eb89 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Fri, 18 Apr 2014 16:28:40 +0200
Subject: [PATCH 2/3] radeon/compute: Implement
PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Igor Gnatenko:
v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)
Bruno Jiménez:
v3: Convert the frequency to MHz from kHz after getting it in
'do_winsys_init'
Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
---
src/gallium/drivers/radeon/r600_pipe_common.c | 7 +++++++
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 5 +++++
src/gallium/winsys/radeon/drm/radeon_winsys.h | 1 +
3 files changed, 13 insertions(+)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 7508865..957186a 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -505,6 +505,13 @@ static int r600_get_compute_param(struct pipe_screen *screen,
}
return sizeof(uint64_t);
+ case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
+ if (ret) {
+ uint32_t *max_clock_frequency = ret;
+ *max_clock_frequency = rscreen->info.max_sclk;
+ }
+ return sizeof(uint32_t);
+
default:
fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
return 0;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index b53beba..7618316 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -317,6 +317,11 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.gart_size = gem_info.gart_size;
ws->info.vram_size = gem_info.vram_size;
+ /* Get max clock frequency info and convert it to MHz */
+ radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SCLK, NULL,
+ &ws->info.max_sclk);
+ ws->info.max_sclk /= 1000;
+
ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
/* Generation-specific queries. */
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index fe0617b..1cb17bb 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -196,6 +196,7 @@ struct radeon_info {
enum chip_class chip_class;
uint32_t gart_size;
uint32_t vram_size;
+ uint32_t max_sclk;
uint32_t drm_major; /* version */
uint32_t drm_minor;
--
1.9.0

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@ -0,0 +1,70 @@
From ca848e8bee7683e296e40a7870750d8a156850ca Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Fri, 18 Apr 2014 16:28:41 +0200
Subject: [PATCH 3/3] clover: Query drivers for max clock frequency
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Igor Gnatenko:
v2: PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY instead of
PIPE_COMPUTE_MAX_CLOCK_FREQUENCY
Bruno Jiménez:
v3: Drivers report clock in Mhz
Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
---
src/gallium/state_trackers/clover/api/device.cpp | 2 +-
src/gallium/state_trackers/clover/core/device.cpp | 6 ++++++
src/gallium/state_trackers/clover/core/device.hpp | 1 +
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/gallium/state_trackers/clover/api/device.cpp b/src/gallium/state_trackers/clover/api/device.cpp
index b77a50d..1bc2692 100644
--- a/src/gallium/state_trackers/clover/api/device.cpp
+++ b/src/gallium/state_trackers/clover/api/device.cpp
@@ -153,7 +153,7 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
break;
case CL_DEVICE_MAX_CLOCK_FREQUENCY:
- buf.as_scalar<cl_uint>() = 0;
+ buf.as_scalar<cl_uint>() = dev.max_clock_frequency();
break;
case CL_DEVICE_ADDRESS_BITS:
diff --git a/src/gallium/state_trackers/clover/core/device.cpp b/src/gallium/state_trackers/clover/core/device.cpp
index 2c5f9b7..2f84677 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -154,6 +154,12 @@ device::max_mem_alloc_size() const {
PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE)[0];
}
+cl_uint
+device::max_clock_frequency() const {
+ return get_compute_param<uint32_t>(pipe,
+ PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY)[0];
+}
+
std::vector<size_t>
device::max_block_size() const {
auto v = get_compute_param<uint64_t>(pipe, PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE);
diff --git a/src/gallium/state_trackers/clover/core/device.hpp b/src/gallium/state_trackers/clover/core/device.hpp
index 433ac81..3662c6b 100644
--- a/src/gallium/state_trackers/clover/core/device.hpp
+++ b/src/gallium/state_trackers/clover/core/device.hpp
@@ -61,6 +61,7 @@ namespace clover {
cl_uint max_const_buffers() const;
size_t max_threads_per_block() const;
cl_ulong max_mem_alloc_size() const;
+ cl_uint max_clock_frequency() const;
std::vector<size_t> max_block_size() const;
std::string device_name() const;
--
1.9.0

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@ -49,13 +49,13 @@
%define _default_patch_fuzz 2
%define gitdate 20140419
%define gitdate 20140430
#% define snapshot
Summary: Mesa graphics libraries
Name: mesa
Version: 10.1.1
Release: 2.%{gitdate}%{?dist}
Release: 3.%{gitdate}%{?dist}
License: MIT
Group: System Environment/Libraries
URL: http://www.mesa3d.org
@ -85,6 +85,11 @@ Patch99: 0001-opencl-use-versioned-.so-in-mesa.icd.patch
Patch100: radeonsi-llvm-version-hack.patch
# https://bugs.freedesktop.org/show_bug.cgi?id=73511
Patch101: 0001-gallium-Add-PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY.patch
Patch102: 0002-radeon-compute-Implement-PIPE_COMPUTE_CAP_MAX_CLOCK_.patch
Patch103: 0003-clover-Query-drivers-for-max-clock-frequency.patch
BuildRequires: pkgconfig autoconf automake libtool
%if %{with_hardware}
BuildRequires: kernel-headers
@ -338,6 +343,9 @@ grep -q ^/ src/gallium/auxiliary/vl/vl_decoder.c && exit 1
%if 0%{?with_opencl}
%patch99 -p1 -b .icd
%patch101 -p1 -b .gallium_max_clk
%patch102 -p1 -b .radeon_max_clk
%patch103 -p1 -b .clover_max_clk
%endif
%patch100 -p1 -b .radeonsi
@ -645,6 +653,10 @@ rm -rf $RPM_BUILD_ROOT
%endif
%changelog
* Wed Apr 30 2014 Igor Gnatenko <i.gnatenko.brain@gmail.com> - 10.1.1-3.20140430
- Update to today snapshot
- apply as downstream patches for reporting GPU max frequency on r600 (FD.o #73511)
* Sat Apr 19 2014 Igor Gnatenko <i.gnatenko.brain@gmail.com> - 10.1.1-2.20140419
- fix buildrequires llvm 3.4-5 to 3.4-6, because 3.4-5 is not available for F20

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@ -1 +1 @@
53e96c430057c768545a8ff2da900402 mesa-20140419.tar.xz
e53a42d8ba8ebb7d07f5781763f9903d mesa-20140430.tar.xz