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Update to 23.3.0
Fix: https://bugzilla.redhat.com/show_bug.cgi?id=2254415
This commit is contained in:
parent
53f97b7f12
commit
b998a951c3
4 changed files with 4 additions and 76 deletions
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@ -1,28 +0,0 @@
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From b32d3c9251e18c77b4d58db61b43797ffb7b05cf Mon Sep 17 00:00:00 2001
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From: Dave Airlie <airlied@redhat.com>
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Date: Wed, 3 Jan 2024 16:31:23 +1000
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Subject: [PATCH] intel/compiler: fix release build unused variable.
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This is only used in an assert.
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Fixes: 158ac265dfd0 ("intel/fs: Make helpers for saving/restoring instruction order")
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---
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src/intel/compiler/brw_fs.cpp | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
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index 696b5db8d9d..aa01a2241ce 100644
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--- a/src/intel/compiler/brw_fs.cpp
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+++ b/src/intel/compiler/brw_fs.cpp
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@@ -6834,7 +6834,7 @@ save_instruction_order(const struct cfg_t *cfg)
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static void
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restore_instruction_order(struct cfg_t *cfg, fs_inst **inst_arr)
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{
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- int num_insts = cfg->last_block()->end_ip + 1;
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+ ASSERTED int num_insts = cfg->last_block()->end_ip + 1;
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int ip = 0;
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foreach_block (block, cfg) {
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--
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2.43.0
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@ -1,42 +0,0 @@
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From 56a72e014fcda3c52cf119115cb71fce2fad86d8 Mon Sep 17 00:00:00 2001
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From: Dave Airlie <airlied@redhat.com>
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Date: Thu, 21 Dec 2023 10:39:08 +1000
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Subject: [PATCH] intel/compiler: reemit boolean resolve for inverted if on
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gen5
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Gen5 adds some boolean conversion instructions after nir emits,
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but that nir srcs don't line up with them, so reemit the boolean
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conversion if we reemit the inot.
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Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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Fixes: 31b5f5a51f3a ("nir/opt_if: Simplify if's with general conditions")
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26782>
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---
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src/intel/compiler/brw_fs_nir.cpp | 11 +++++++++++
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1 file changed, 11 insertions(+)
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diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
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index 33f2a4046b2..ccdd0fe7db8 100644
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--- a/src/intel/compiler/brw_fs_nir.cpp
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+++ b/src/intel/compiler/brw_fs_nir.cpp
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@@ -422,6 +422,17 @@ fs_visitor::nir_emit_if(nir_if *if_stmt)
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invert = true;
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cond_reg = get_nir_src(cond->src[0].src);
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cond_reg = offset(cond_reg, bld, cond->src[0].swizzle[0]);
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+
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+ if (devinfo->ver <= 5 &&
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+ (cond->instr.pass_flags & BRW_NIR_BOOLEAN_MASK) == BRW_NIR_BOOLEAN_NEEDS_RESOLVE) {
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+ /* redo boolean resolve on gen5 */
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+ fs_reg masked = bld.vgrf(BRW_REGISTER_TYPE_D);
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+ bld.AND(masked, cond_reg, brw_imm_d(1));
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+ masked.negate = true;
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+ fs_reg tmp = bld.vgrf(cond_reg.type);
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+ bld.MOV(retype(tmp, BRW_REGISTER_TYPE_D), masked);
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+ cond_reg = tmp;
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+ }
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} else {
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invert = false;
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cond_reg = get_nir_src(if_stmt->condition);
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--
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2.43.0
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@ -61,7 +61,7 @@
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Name: mesa
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Summary: Mesa graphics libraries
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%global ver 23.3.2
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%global ver 23.3.3
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Version: %{lua:ver = string.gsub(rpm.expand("%{ver}"), "-", "~"); print(ver)}
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Release: %autorelease
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License: MIT AND BSD-3-Clause AND SGI-B-2.0
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@ -74,10 +74,8 @@ Source0: https://archive.mesa3d.org/mesa-%{ver}.tar.xz
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Source1: Mesa-MLAA-License-Clarification-Email.txt
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Patch10: gnome-shell-glthread-disable.patch
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Patch11: 0001-intel-compiler-reemit-boolean-resolve-for-inverted-i.patch
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Patch12: 0001-intel-compiler-fix-release-build-unused-variable.patch
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Patch13: zink-fix-resizable-bar-detection-logic.patch
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Patch14: mesa-meson-c99.patch
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Patch11: zink-fix-resizable-bar-detection-logic.patch
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Patch12: mesa-meson-c99.patch
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BuildRequires: meson >= 1.2.0
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BuildRequires: gcc
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2
sources
2
sources
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@ -1 +1 @@
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SHA512 (mesa-23.3.2.tar.xz) = 634d2b67ade2121de3f19f2cccd4bf7ceb2ac391b9366587ed1c2412444e010de8ec14a25529fdec1f43f943096422eb23cefcb8a89d2f8b20286850188b65c3
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SHA512 (mesa-23.3.3.tar.xz) = bed23e8324b026edd5d2b16a381ec563cf2fa9be9c8fbe8d9fb907cab9d87eef91f493fb9d4e3973d4b679e271d2a85ce48af491585638ab97f087532fc63c30
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