Update to 23.3.0

Fix: https://bugzilla.redhat.com/show_bug.cgi?id=2254415
This commit is contained in:
José Expósito 2024-01-11 12:20:36 +01:00
parent 53f97b7f12
commit b998a951c3
4 changed files with 4 additions and 76 deletions

View file

@ -1,28 +0,0 @@
From b32d3c9251e18c77b4d58db61b43797ffb7b05cf Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Wed, 3 Jan 2024 16:31:23 +1000
Subject: [PATCH] intel/compiler: fix release build unused variable.
This is only used in an assert.
Fixes: 158ac265dfd0 ("intel/fs: Make helpers for saving/restoring instruction order")
---
src/intel/compiler/brw_fs.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 696b5db8d9d..aa01a2241ce 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -6834,7 +6834,7 @@ save_instruction_order(const struct cfg_t *cfg)
static void
restore_instruction_order(struct cfg_t *cfg, fs_inst **inst_arr)
{
- int num_insts = cfg->last_block()->end_ip + 1;
+ ASSERTED int num_insts = cfg->last_block()->end_ip + 1;
int ip = 0;
foreach_block (block, cfg) {
--
2.43.0

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@ -1,42 +0,0 @@
From 56a72e014fcda3c52cf119115cb71fce2fad86d8 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Thu, 21 Dec 2023 10:39:08 +1000
Subject: [PATCH] intel/compiler: reemit boolean resolve for inverted if on
gen5
Gen5 adds some boolean conversion instructions after nir emits,
but that nir srcs don't line up with them, so reemit the boolean
conversion if we reemit the inot.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 31b5f5a51f3a ("nir/opt_if: Simplify if's with general conditions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26782>
---
src/intel/compiler/brw_fs_nir.cpp | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 33f2a4046b2..ccdd0fe7db8 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -422,6 +422,17 @@ fs_visitor::nir_emit_if(nir_if *if_stmt)
invert = true;
cond_reg = get_nir_src(cond->src[0].src);
cond_reg = offset(cond_reg, bld, cond->src[0].swizzle[0]);
+
+ if (devinfo->ver <= 5 &&
+ (cond->instr.pass_flags & BRW_NIR_BOOLEAN_MASK) == BRW_NIR_BOOLEAN_NEEDS_RESOLVE) {
+ /* redo boolean resolve on gen5 */
+ fs_reg masked = bld.vgrf(BRW_REGISTER_TYPE_D);
+ bld.AND(masked, cond_reg, brw_imm_d(1));
+ masked.negate = true;
+ fs_reg tmp = bld.vgrf(cond_reg.type);
+ bld.MOV(retype(tmp, BRW_REGISTER_TYPE_D), masked);
+ cond_reg = tmp;
+ }
} else {
invert = false;
cond_reg = get_nir_src(if_stmt->condition);
--
2.43.0

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@ -61,7 +61,7 @@
Name: mesa
Summary: Mesa graphics libraries
%global ver 23.3.2
%global ver 23.3.3
Version: %{lua:ver = string.gsub(rpm.expand("%{ver}"), "-", "~"); print(ver)}
Release: %autorelease
License: MIT AND BSD-3-Clause AND SGI-B-2.0
@ -74,10 +74,8 @@ Source0: https://archive.mesa3d.org/mesa-%{ver}.tar.xz
Source1: Mesa-MLAA-License-Clarification-Email.txt
Patch10: gnome-shell-glthread-disable.patch
Patch11: 0001-intel-compiler-reemit-boolean-resolve-for-inverted-i.patch
Patch12: 0001-intel-compiler-fix-release-build-unused-variable.patch
Patch13: zink-fix-resizable-bar-detection-logic.patch
Patch14: mesa-meson-c99.patch
Patch11: zink-fix-resizable-bar-detection-logic.patch
Patch12: mesa-meson-c99.patch
BuildRequires: meson >= 1.2.0
BuildRequires: gcc

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@ -1 +1 @@
SHA512 (mesa-23.3.2.tar.xz) = 634d2b67ade2121de3f19f2cccd4bf7ceb2ac391b9366587ed1c2412444e010de8ec14a25529fdec1f43f943096422eb23cefcb8a89d2f8b20286850188b65c3
SHA512 (mesa-23.3.3.tar.xz) = bed23e8324b026edd5d2b16a381ec563cf2fa9be9c8fbe8d9fb907cab9d87eef91f493fb9d4e3973d4b679e271d2a85ce48af491585638ab97f087532fc63c30