rpms/mesa
8
0
Fork 0
mirror of https://src.fedoraproject.org/rpms/mesa.git synced 2024-11-24 17:35:18 +00:00
Code Issues 12 Projects Releases Packages Wiki Activity Actions

dead patch removal

Browse source
This commit is contained in:
Adam Jackson 2011-04-27 13:15:13 -04:00
parent 832eb277ac
commit 4f2860a0b4
5 changed files with 0 additions and 1239 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
mesa-7.1-osmesa-version.patch
View file

@ -1,12 +0,0 @@
diff -up Mesa-7.1/src/mesa/drivers/osmesa/Makefile.jx Mesa-7.1/src/mesa/drivers/osmesa/Makefile
--- Mesa-7.1/src/mesa/drivers/osmesa/Makefile.jx 2008-08-28 14:05:47.000000000 -0400
+++ Mesa-7.1/src/mesa/drivers/osmesa/Makefile 2008-08-28 14:07:13.000000000 -0400
@@ -46,7 +46,7 @@ osmesa8: $(TOP)/lib/$(OSMESA_LIB_NAME)
$(TOP)/lib/$(OSMESA_LIB_NAME): $(OBJECTS)
$(MKLIB) -o $(OSMESA_LIB) -linker '$(CC)' -ldflags '$(LDFLAGS)' \
- -major $(MESA_MAJOR) -minor $(MESA_MINOR) -patch $(MESA_TINY) \
+ -major 6 -minor 5 -patch 3 \
-install $(TOP)/$(LIB_DIR) $(MKLIB_OPTIONS) \
-id $(INSTALL_LIB_DIR)/lib$(OSMESA_LIB).$(MESA_MAJOR).dylib \
$(OSMESA_LIB_DEPS) $(OBJECTS)

16
mesa-7.3-965-texture-size.patch
View file

@ -1,16 +0,0 @@
diff -up Mesa-7.3/src/mesa/drivers/dri/i965/brw_context.c.jx Mesa-7.3/src/mesa/drivers/dri/i965/brw_context.c
--- Mesa-7.3/src/mesa/drivers/dri/i965/brw_context.c.jx 2009-01-21 10:55:47.000000000 -0500
+++ Mesa-7.3/src/mesa/drivers/dri/i965/brw_context.c 2009-02-09 17:55:02.000000000 -0500
@@ -138,10 +138,10 @@ GLboolean brwCreateContext( const __GLco
/* Advertise the full hardware capabilities. The new memory
* manager should cope much better with overload situations:
*/
- ctx->Const.MaxTextureLevels = 12;
+ ctx->Const.MaxTextureLevels = 13;
ctx->Const.Max3DTextureLevels = 9;
ctx->Const.MaxCubeTextureLevels = 12;
- ctx->Const.MaxTextureRectSize = (1<<11);
+ ctx->Const.MaxTextureRectSize = (1<<12);
/* if conformance mode is set, swrast can handle any size AA point */
ctx->Const.MaxPointSizeAA = 255.0;

1001
mesa-7.3-dri-configs-fixes.patch
View file

File diff suppressed because it is too large Load diff

85
mesa-7.5-get-driver-name.patch
View file

@ -1,85 +0,0 @@
commit a3c3c1f1437de0186d70de9017a6a8e404ecf482
Author: Adam Jackson <ajax@redhat.com>
Date: Tue Apr 14 17:56:29 2009 -0400
glx: Make glXGetScreenDriver() work for DRI2
diff --git a/src/glx/x11/dri_glx.c b/src/glx/x11/dri_glx.c
index 3089aa1..87d62ad 100644
--- a/src/glx/x11/dri_glx.c
+++ b/src/glx/x11/dri_glx.c
@@ -40,6 +40,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "glxclient.h"
#include "glcontextmodes.h"
#include "xf86dri.h"
+#include "dri2.h"
#include "sarea.h"
#include <dlfcn.h>
#include <sys/types.h>
@@ -75,32 +76,45 @@ struct __GLXDRIcontextPrivateRec {
*/
static Bool driGetDriverName(Display *dpy, int scrNum, char **driverName)
{
- int directCapable;
- Bool b;
- int driverMajor, driverMinor, driverPatch;
+ int directCapable;
+ Bool b;
+ int event, error;
+ int driverMajor, driverMinor, driverPatch;
- *driverName = NULL;
+ *driverName = NULL;
- if (!XF86DRIQueryDirectRenderingCapable(dpy, scrNum, &directCapable)) {
- ErrorMessageF("XF86DRIQueryDirectRenderingCapable failed\n");
- return False;
- }
- if (!directCapable) {
- ErrorMessageF("XF86DRIQueryDirectRenderingCapable returned false\n");
- return False;
- }
+ if (XF86DRIQueryExtension(dpy, &event, &error)) { /* DRI1 */
+ if (!XF86DRIQueryDirectRenderingCapable(dpy, scrNum, &directCapable)) {
+ ErrorMessageF("XF86DRIQueryDirectRenderingCapable failed\n");
+ return False;
+ }
+ if (!directCapable) {
+ ErrorMessageF("XF86DRIQueryDirectRenderingCapable returned false\n");
+ return False;
+ }
- b = XF86DRIGetClientDriverName(dpy, scrNum, &driverMajor, &driverMinor,
- &driverPatch, driverName);
- if (!b) {
- ErrorMessageF("Cannot determine driver name for screen %d\n", scrNum);
- return False;
- }
+ b = XF86DRIGetClientDriverName(dpy, scrNum, &driverMajor, &driverMinor,
+ &driverPatch, driverName);
+ if (!b) {
+ ErrorMessageF("Cannot determine driver name for screen %d\n", scrNum);
+ return False;
+ }
+
+ InfoMessageF("XF86DRIGetClientDriverName: %d.%d.%d %s (screen %d)\n",
+ driverMajor, driverMinor, driverPatch, *driverName, scrNum);
+
+ return True;
+ } else if (DRI2QueryExtension(dpy, &event, &error)) { /* DRI2 */
+ char *dev;
+ Bool ret = DRI2Connect(dpy, RootWindow(dpy, scrNum), driverName, &dev);
- InfoMessageF("XF86DRIGetClientDriverName: %d.%d.%d %s (screen %d)\n",
- driverMajor, driverMinor, driverPatch, *driverName, scrNum);
+ if (ret)
+ Xfree(dev);
+
+ return ret;
+ }
- return True;
+ return False;
}
/*

125
mesa-intel-snb-regression-reverts.patch
View file

@ -1,125 +0,0 @@
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 32ee37f..21ce92c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -52,35 +52,6 @@ static void guess_execution_size(struct brw_compile *p,
}
-/**
- * Prior to Sandybridge, the SEND instruction accepted non-MRF source
- * registers, implicitly moving the operand to a message register.
- *
- * On Sandybridge, this is no longer the case. This function performs the
- * explicit move; it should be called before emitting a SEND instruction.
- */
-static void
-gen6_resolve_implied_move(struct brw_compile *p,
- struct brw_reg *src,
- GLuint msg_reg_nr)
-{
- struct intel_context *intel = &p->brw->intel;
- if (intel->gen != 6)
- return;
-
- if (src->file == BRW_ARCHITECTURE_REGISTER_FILE && src->nr == BRW_ARF_NULL)
- return;
-
- brw_push_insn_state(p);
- brw_set_mask_control(p, BRW_MASK_DISABLE);
- brw_set_compression_control(p, BRW_COMPRESSION_NONE);
- brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
- retype(*src, BRW_REGISTER_TYPE_UD));
- brw_pop_insn_state(p);
- *src = brw_message_reg(msg_reg_nr);
-}
-
-
static void brw_set_dest(struct brw_compile *p,
struct brw_instruction *insn,
struct brw_reg dest)
@@ -1800,7 +1771,6 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
GLuint bind_table_index)
{
struct intel_context *intel = &p->brw->intel;
- struct brw_reg src = brw_vec8_grf(0, 0);
int msg_type;
/* Setup MRF[1] with offset into const buffer */
@@ -1817,7 +1787,6 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
addr_reg, brw_imm_d(offset));
brw_pop_insn_state(p);
- gen6_resolve_implied_move(p, &src, 0);
struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
insn->header.predicate_control = BRW_PREDICATE_NONE;
@@ -1826,7 +1795,7 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
insn->header.mask_control = BRW_MASK_DISABLE;
brw_set_dest(p, insn, dest);
- brw_set_src0(insn, src);
+ brw_set_src0(insn, brw_vec8_grf(0, 0));
if (intel->gen == 6)
msg_type = GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
@@ -1997,7 +1966,20 @@ void brw_SAMPLE(struct brw_compile *p,
{
struct brw_instruction *insn;
- gen6_resolve_implied_move(p, &src0, msg_reg_nr);
+ /* Sandybridge doesn't have the implied move for SENDs,
+ * and the first message register index comes from src0.
+ */
+ if (intel->gen >= 6) {
+ if (src0.file != BRW_ARCHITECTURE_REGISTER_FILE ||
+ src0.nr != BRW_ARF_NULL) {
+ brw_push_insn_state(p);
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_set_compression_control(p, BRW_COMPRESSION_NONE);
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), src0.type), src0);
+ brw_pop_insn_state(p);
+ }
+ src0 = brw_message_reg(msg_reg_nr);
+ }
insn = next_insn(p, BRW_OPCODE_SEND);
insn->header.predicate_control = 0; /* XXX */
@@ -2052,7 +2034,17 @@ void brw_urb_WRITE(struct brw_compile *p,
struct intel_context *intel = &p->brw->intel;
struct brw_instruction *insn;
- gen6_resolve_implied_move(p, &src0, msg_reg_nr);
+ /* Sandybridge doesn't have the implied move for SENDs,
+ * and the first message register index comes from src0.
+ */
+ if (intel->gen >= 6) {
+ brw_push_insn_state(p);
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
+ retype(src0, BRW_REGISTER_TYPE_UD));
+ brw_pop_insn_state(p);
+ src0 = brw_message_reg(msg_reg_nr);
+ }
insn = next_insn(p, BRW_OPCODE_SEND);
@@ -2162,7 +2154,17 @@ void brw_ff_sync(struct brw_compile *p,
struct intel_context *intel = &p->brw->intel;
struct brw_instruction *insn;
- gen6_resolve_implied_move(p, &src0, msg_reg_nr);
+ /* Sandybridge doesn't have the implied move for SENDs,
+ * and the first message register index comes from src0.
+ */
+ if (intel->gen >= 6) {
+ brw_push_insn_state(p);
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_MOV(p, retype(brw_message_reg(msg_reg_nr), BRW_REGISTER_TYPE_UD),
+ retype(src0, BRW_REGISTER_TYPE_UD));
+ brw_pop_insn_state(p);
+ src0 = brw_message_reg(msg_reg_nr);
+ }
insn = next_insn(p, BRW_OPCODE_SEND);
brw_set_dest(p, insn, dest);