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https://src.fedoraproject.org/rpms/mesa.git
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154 lines
6 KiB
Diff
154 lines
6 KiB
Diff
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From fddf49504e1bebb7efc52c1a0516300c0f217f18 Mon Sep 17 00:00:00 2001
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From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
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Date: Wed, 26 Jun 2024 12:11:48 +0200
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Subject: [PATCH] Revert "ac, radeonsi: remove has_syncobj,
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has_fence_to_handle"
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This reverts commit 02fe3c32cdfc3cf48cd691d6321978b8d4c3e61b.
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Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11352
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---
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src/amd/common/ac_gpu_info.c | 12 ++++++++++++
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src/amd/common/ac_gpu_info.h | 2 ++
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src/gallium/drivers/r600/r600_pipe_common.c | 1 +
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src/gallium/drivers/radeonsi/si_fence.c | 10 ++++++++++
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src/gallium/drivers/radeonsi/si_get.c | 8 ++++++--
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5 files changed, 31 insertions(+), 2 deletions(-)
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diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
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index 78febf796b4..3f711bd45ec 100644
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--- a/src/amd/common/ac_gpu_info.c
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+++ b/src/amd/common/ac_gpu_info.c
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@@ -355,6 +355,14 @@ static intptr_t readlink(const char *path, char *buf, size_t bufsiz)
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#define CIK_TILE_MODE_COLOR_2D 14
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+static bool has_syncobj(int fd)
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+{
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+ uint64_t value;
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+ if (drmGetCap(fd, DRM_CAP_SYNCOBJ, &value))
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+ return false;
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+ return value ? true : false;
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+}
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+
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static bool has_timeline_syncobj(int fd)
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{
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uint64_t value;
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@@ -1068,7 +1076,9 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
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info->memory_freq_mhz_effective *= ac_memory_ops_per_clock(info->vram_type);
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info->has_userptr = true;
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+ info->has_syncobj = has_syncobj(fd);
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info->has_timeline_syncobj = has_timeline_syncobj(fd);
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+ info->has_fence_to_handle = info->has_syncobj;
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info->has_local_buffers = true;
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info->has_bo_metadata = true;
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info->has_eqaa_surface_allocator = info->gfx_level < GFX11;
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@@ -1974,7 +1984,9 @@ void ac_print_gpu_info(const struct radeon_info *info, FILE *f)
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fprintf(f, "Kernel & winsys capabilities:\n");
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fprintf(f, " drm = %i.%i.%i\n", info->drm_major, info->drm_minor, info->drm_patchlevel);
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fprintf(f, " has_userptr = %i\n", info->has_userptr);
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+ fprintf(f, " has_syncobj = %u\n", info->has_syncobj);
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fprintf(f, " has_timeline_syncobj = %u\n", info->has_timeline_syncobj);
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+ fprintf(f, " has_fence_to_handle = %u\n", info->has_fence_to_handle);
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fprintf(f, " has_local_buffers = %u\n", info->has_local_buffers);
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fprintf(f, " has_bo_metadata = %u\n", info->has_bo_metadata);
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fprintf(f, " has_eqaa_surface_allocator = %u\n", info->has_eqaa_surface_allocator);
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diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
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index 68fbe909a97..40670d87770 100644
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--- a/src/amd/common/ac_gpu_info.h
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+++ b/src/amd/common/ac_gpu_info.h
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@@ -218,7 +218,9 @@ struct radeon_info {
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uint32_t max_submitted_ibs[AMD_NUM_IP_TYPES];
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bool is_amdgpu;
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bool has_userptr;
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+ bool has_syncobj;
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bool has_timeline_syncobj;
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+ bool has_fence_to_handle;
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bool has_local_buffers;
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bool has_bo_metadata;
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bool has_eqaa_surface_allocator;
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diff --git a/src/gallium/drivers/r600/r600_pipe_common.c b/src/gallium/drivers/r600/r600_pipe_common.c
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index aaa171a07ed..5a10aad5907 100644
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--- a/src/gallium/drivers/r600/r600_pipe_common.c
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+++ b/src/gallium/drivers/r600/r600_pipe_common.c
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@@ -1338,6 +1338,7 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
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printf("drm = %i.%i.%i\n", rscreen->info.drm_major,
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rscreen->info.drm_minor, rscreen->info.drm_patchlevel);
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printf("has_userptr = %i\n", rscreen->info.has_userptr);
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+ printf("has_syncobj = %u\n", rscreen->info.has_syncobj);
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printf("r600_max_quad_pipes = %i\n", rscreen->info.r600_max_quad_pipes);
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printf("max_gpu_freq_mhz = %i\n", rscreen->info.max_gpu_freq_mhz);
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diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
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index a1ae9125e00..1d2406df9fd 100644
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--- a/src/gallium/drivers/radeonsi/si_fence.c
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+++ b/src/gallium/drivers/radeonsi/si_fence.c
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@@ -374,10 +374,16 @@ static void si_create_fence_fd(struct pipe_context *ctx, struct pipe_fence_handl
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switch (type) {
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case PIPE_FD_TYPE_NATIVE_SYNC:
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+ if (!sscreen->info.has_fence_to_handle)
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+ goto finish;
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+
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sfence->gfx = ws->fence_import_sync_file(ws, fd);
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break;
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case PIPE_FD_TYPE_SYNCOBJ:
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+ if (!sscreen->info.has_syncobj)
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+ goto finish;
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+
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sfence->gfx = ws->fence_import_syncobj(ws, fd);
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break;
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@@ -385,6 +391,7 @@ static void si_create_fence_fd(struct pipe_context *ctx, struct pipe_fence_handl
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unreachable("bad fence fd type when importing");
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}
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+finish:
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if (!sfence->gfx) {
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FREE(sfence);
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return;
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@@ -400,6 +407,9 @@ static int si_fence_get_fd(struct pipe_screen *screen, struct pipe_fence_handle
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struct si_fence *sfence = (struct si_fence *)fence;
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int gfx_fd = -1;
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+ if (!sscreen->info.has_fence_to_handle)
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+ return -1;
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+
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util_queue_fence_wait(&sfence->ready);
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/* Deferred fences aren't supported. */
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diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
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index a9ac90dca52..3c8a75e9583 100644
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--- a/src/gallium/drivers/radeonsi/si_get.c
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+++ b/src/gallium/drivers/radeonsi/si_get.c
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@@ -168,8 +168,6 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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case PIPE_CAP_ALLOW_GLTHREAD_BUFFER_SUBDATA_OPT: /* TODO: remove if it's slow */
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case PIPE_CAP_NULL_TEXTURES:
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case PIPE_CAP_HAS_CONST_BW:
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- case PIPE_CAP_FENCE_SIGNAL:
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- case PIPE_CAP_NATIVE_FENCE_FD:
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case PIPE_CAP_CL_GL_SHARING:
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return 1;
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@@ -287,9 +285,15 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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PIPE_CONTEXT_PRIORITY_MEDIUM |
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PIPE_CONTEXT_PRIORITY_HIGH;
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+ case PIPE_CAP_FENCE_SIGNAL:
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+ return sscreen->info.has_syncobj;
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+
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case PIPE_CAP_CONSTBUF0_FLAGS:
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return SI_RESOURCE_FLAG_32BIT;
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+ case PIPE_CAP_NATIVE_FENCE_FD:
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+ return sscreen->info.has_fence_to_handle;
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+
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case PIPE_CAP_DRAW_PARAMETERS:
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case PIPE_CAP_MULTI_DRAW_INDIRECT:
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case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
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--
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2.45.2
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