llvm/0003-DAGCombiner-Avoid-generating-illegal-vector-INT_TO_F.patch
Adam Jackson 97e156aa42 Update R600 patches
- Move static libs to -static subpackage
- Prep for F18 backport
2013-03-08 05:41:56 -05:00

53 lines
2.2 KiB
Diff

From 85259e7305201764ae9d85a7cbf2809da779bf5c Mon Sep 17 00:00:00 2001
From: tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8>
Date: Wed, 2 Jan 2013 22:13:01 +0000
Subject: [PATCH] DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes
DAGCombiner::reduceBuildVecConvertToConvertBuildVec() was making two
mistakes:
1. It was checking the legality of scalar INT_TO_FP nodes and then generating
vector nodes.
2. It was passing the result value type to
TargetLoweringInfo::getOperationAction() when it should have been
passing the value type of the first operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171420 91177308-0d34-0410-b5e6-96231b3b80d8
---
lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 +++---
.../R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll | 33 ++++++++++++++++++++++
test/CodeGen/R600/vec4-expand.ll | 3 --
test/CodeGen/X86/cvtv2f32.ll | 4 +++
4 files changed, 42 insertions(+), 7 deletions(-)
create mode 100644 test/CodeGen/R600/dagcombiner-bug-illegal-vec4-int-to-fp.ll
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 37d7731..d0ca5c0 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -8514,11 +8514,8 @@ SDValue DAGCombiner::reduceBuildVecConvertToConvertBuildVec(SDNode *N) {
if (Opcode == ISD::DELETED_NODE &&
(Opc == ISD::UINT_TO_FP || Opc == ISD::SINT_TO_FP)) {
Opcode = Opc;
- // If not supported by target, bail out.
- if (TLI.getOperationAction(Opcode, VT) != TargetLowering::Legal &&
- TLI.getOperationAction(Opcode, VT) != TargetLowering::Custom)
- return SDValue();
}
+
if (Opc != Opcode)
return SDValue();
@@ -8543,6 +8540,10 @@ SDValue DAGCombiner::reduceBuildVecConvertToConvertBuildVec(SDNode *N) {
assert(SrcVT != MVT::Other && "Cannot determine source type!");
EVT NVT = EVT::getVectorVT(*DAG.getContext(), SrcVT, NumInScalars);
+
+ if (!TLI.isOperationLegalOrCustom(Opcode, NVT))
+ return SDValue();
+
SmallVector<SDValue, 8> Opnds;
for (unsigned i = 0; i != NumInScalars; ++i) {
SDValue In = N->getOperand(i);