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56577a7d89
Although this patch is correct and at some point it will be re-introduced, currently shim does not support the loader protocol so drop it in the meanwhile. Signed-off-by: Leo Sandoval <lsandova@redhat.com>
119 lines
4 KiB
Diff
119 lines
4 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Avnish Chouhan <avnish@linux.ibm.com>
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Date: Thu, 23 May 2024 18:43:14 +0530
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Subject: [PATCH] kern/ieee1275/init: Add IEEE 1275 Radix support for KVM on
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Power
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This patch adds support for Radix, Xive and Radix_gtse in Options
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vector5 which is required for KVM LPARs. KVM LPARs ONLY support
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Radix and not the Hash. Not enabling Radix on any PowerVM KVM LPARs
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will result in boot failure.
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Signed-off-by: Avnish Chouhan <avnish@linux.ibm.com>
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Reviewed-by: Daniel Kiper <daniel.kiper@oracle.com>
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---
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grub-core/kern/ieee1275/init.c | 63 +++++++++++++++++++++++++++++++++++++++++-
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1 file changed, 62 insertions(+), 1 deletion(-)
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diff --git a/grub-core/kern/ieee1275/init.c b/grub-core/kern/ieee1275/init.c
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index 13e8a5b4b..6c5f4fb77 100644
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--- a/grub-core/kern/ieee1275/init.c
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+++ b/grub-core/kern/ieee1275/init.c
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@@ -113,6 +113,16 @@ grub_addr_t grub_ieee1275_original_stack;
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#define DRC_INFO 0x40
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#define BYTE22 (DY_MEM_V2 | DRC_INFO)
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+/* For ibm,arch-vec-5-platform-support. */
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+#define XIVE_INDEX 0x17
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+#define MMU_INDEX 0x18
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+#define RADIX_GTSE_INDEX 0x1a
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+#define RADIX_ENABLED 0x40
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+#define XIVE_ENABLED 0x40
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+#define HASH_ENABLED 0x00
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+#define MAX_SUPPORTED 0xC0
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+#define RADIX_GTSE_ENABLED 0x40
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+
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void
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grub_exit (int rc __attribute__((unused)))
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{
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@@ -739,6 +749,10 @@ struct option_vector5
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grub_uint32_t platform_facilities;
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grub_uint8_t sub_processors;
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grub_uint8_t byte22;
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+ grub_uint8_t xive;
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+ grub_uint8_t mmu;
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+ grub_uint8_t hpt_ext;
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+ grub_uint8_t radix_gtse;
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} GRUB_PACKED;
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struct pvr_entry
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@@ -777,6 +791,13 @@ grub_ieee1275_ibm_cas (void)
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{
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int rc;
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grub_ieee1275_ihandle_t root;
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+ grub_uint8_t ibm_arch_platform_support[8];
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+ grub_ssize_t actual;
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+ grub_uint8_t xive_support = 0;
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+ grub_uint8_t mmu_support = 0;
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+ grub_uint8_t radix_gtse_support = 0;
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+ int i = 0;
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+ int prop_len = 8;
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struct cas_args
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{
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struct grub_ieee1275_common_hdr common;
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@@ -785,6 +806,46 @@ grub_ieee1275_ibm_cas (void)
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grub_ieee1275_cell_t cas_addr;
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grub_ieee1275_cell_t result;
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} args;
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+
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+ grub_ieee1275_get_integer_property (grub_ieee1275_chosen,
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+ "ibm,arch-vec-5-platform-support",
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+ (grub_uint32_t *) ibm_arch_platform_support,
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+ sizeof (ibm_arch_platform_support),
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+ &actual);
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+
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+ for (i = 0; i < prop_len; i++)
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+ {
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+ switch (ibm_arch_platform_support[i])
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+ {
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+ case XIVE_INDEX:
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+ if (ibm_arch_platform_support[i + 1] & MAX_SUPPORTED)
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+ xive_support = XIVE_ENABLED;
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+ else
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+ xive_support = 0;
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+ break;
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+
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+ case MMU_INDEX:
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+ if (ibm_arch_platform_support[i + 1] & MAX_SUPPORTED)
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+ mmu_support = RADIX_ENABLED;
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+ else
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+ mmu_support = HASH_ENABLED;
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+ break;
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+
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+ case RADIX_GTSE_INDEX:
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+ if (mmu_support == RADIX_ENABLED)
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+ radix_gtse_support = ibm_arch_platform_support[i + 1] & RADIX_GTSE_ENABLED;
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+ else
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+ radix_gtse_support = 0;
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+ break;
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+
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+ default:
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+ /* Ignoring the other indexes of ibm,arch-vec-5-platform-support. */
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+ break;
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+ }
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+ /* Skipping the property value. */
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+ i++;
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+ }
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+
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struct cas_vector vector =
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{
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.pvr_list = { { 0x00000000, 0xffffffff } }, /* any processor */
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@@ -801,7 +862,7 @@ grub_ieee1275_ibm_cas (void)
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.vec4 = 0x0001, /* set required minimum capacity % to the lowest value */
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.vec5_size = 1 + sizeof (struct option_vector5) - 2,
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.vec5 = {
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- 0, BYTE2, 0, CMO, ASSOCIATIVITY, BIN_OPTS, 0, 0, MAX_CPU, 0, 0, PLATFORM_FACILITIES, SUB_PROCESSORS, BYTE22
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+ 0, BYTE2, 0, CMO, ASSOCIATIVITY, BIN_OPTS, 0, 0, MAX_CPU, 0, 0, PLATFORM_FACILITIES, SUB_PROCESSORS, BYTE22, xive_support, mmu_support, 0, radix_gtse_support
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}
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};
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